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STA, timing closure, Senior Timng Engineer, Semiconductor MNC, Bangalore

STA, timing closure, Senior Timng Engineer, Semiconductor MNC, Bangalore

The Job involves handling timing analysis and closure of complex units of high performance processor chip. This role Involves working with global timing and PD leads as well as Logic Design and PD engineers and project managers in a matrix organization. ~Looking for professionals with hands on...

Updated: 2011-Dec-27 02:54 PM

Industry: Semiconductor, HardwareRole: Senior Timng Engineer

Experience Level: 6.0 to 12.0 yrsLocation: Bangalore (India)

Employer: Semiconductor MNC

Keywords: STA timing closure tcl perl

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Physical Design Methodology, STA / Physical Design Tool Development, Semiconductor MNC, Bangalore

Physical Design Methodology, STA / Physical Design Tool Development, Semiconductor MNC, Bangalore

Physical Design Methodology Engineer: Need a physical design and verification savvy engineer to do electronic design automation tools qualification and development for high-speed microprocessor flows . Should have good experience with semicustom clock and power planning, hierarchical and ...

Updated: 2011-Jul-07 02:08 PM

Industry: SemiconductorRole: Physical Design Methodology , STA / Physical Design Tool Development

Experience Level: 3.0 to 10.0 yrsLocation: Bangalore (India)

Keywords: flowmethodologySKILLTCL PerledafloorplansplacementroutingDRCLVScc++Algorithm

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